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Aviral Shrivastava
Professor
,
Arizona State University
,
Computer Science and Engineering
Professor
,
Arizona State University
,
Embedded Systems, Consortium for (CES)
Professor
,
Arizona State University
,
Engineering, Ira A. Fulton Schools of (IAFSE)
Professor
,
Arizona State University
,
Assured and Scalable Data Engineering, Center for (CASCADE)
Professor
,
Arizona State University
,
Cybersecurity and Digital Forensics, Center for (CDF)
h-index
2222
Citations
25
h-index
Calculated based on number of publications stored in Pure and citations from Scopus
2000
2024
Research activity per year
Overview
Fingerprint
Network
Grants
(24)
Scholarly Works
(176)
Press/Media
(35)
Similar Profiles
(6)
Scholarly Works
Scholarly Works per year
2000
2008
2009
2010
2011
2013
2016
2017
2019
2022
2024
101
Conference contribution
53
Article
9
Editorial
5
Patent
8
More
3
Chapter
2
Review article
1
Book
1
Foreword/postscript
1
Conference article
Scholarly Works per year
Scholarly Works per year
5 results
Publication Year, Title
(descending)
Publication Year, Title
(ascending)
Title
Type
Filter
Patent
Search results
2015
Optimized Multi-Channel BCH Decoder
Shrivastava, A.
(Inventor),
Jun 11 2015
Research output
:
Patent
Multichannel
100%
Clock Speed
100%
Error Location
100%
BCH Decoder
100%
Potential Application
50%
2014
GCCFG (Global Call Control Flow Graph): A data structure for Inter-procedural Optimizations
Shrivastava, A.
(Inventor),
Aug 25 2014
Research output
:
Patent
Multicore Processing
100%
Graph Transform
49%
Complex Computing
49%
Succinct Representation
49%
Multiple Exits
49%
Path Selection Based Acceleration of Conditionals in CGRAs
Shrivastava, A.
(Inventor),
Oct 27 2014
Research output
:
Patent
If-Then-Else Statement
100%
Interprocedural Optimization
50%
Single-path
16%
Parallel Loops
16%
Speed Ability
16%
2013
An Efficient Stack Data Management for Scratchpad Memory based Multi-core Processors
Shrivastava, A.
(Inventor),
Jan 28 2013
Research output
:
Patent
Data Management
100%
Scratchpad Memory
100%
Multicore Processor
100%
Memory Management
100%
Multi-Core Architectures
50%
2012
An infrastructure for memory management on LLM multi-core architectures
Shrivastava, A.
(Inventor),
Oct 25 2012
Research output
:
Patent
Stack Pointer
100%
Dynamic Memory Allocation
100%
Computer Programming Languages
100%
Direct Memory Access
100%
API Function
66%