Engineering
Process Variation
100%
Energy Engineering
80%
Battery (Electrochemical Energy Engineering)
72%
Logic Gate
54%
Tasks
49%
Random Variable ΞΎ
41%
Electric Power Utilization
41%
Logic Circuit
39%
Optimisation Problem
37%
Digital Circuits
31%
Interconnects
28%
Simulators
26%
Application Specific Integrated Circuit
24%
Nodes
24%
Metrics
24%
Energy Conservation
23%
Energy Efficiency
23%
Thermal Model
23%
Nanoscale
22%
Resistive
21%
Field Programmable Gate Arrays
20%
Switching Activity
20%
Energy Dissipation
20%
Negative-Bias Temperature Instability
19%
Single Chip
19%
Input Multi
18%
SPICE
18%
Arrival Time
17%
Combinatorial Circuits
16%
Array Architecture
16%
Perceptron
16%
Reducing Power
15%
Objective Function
15%
Gate Length
14%
Functional Unit
14%
Fuel Cell
14%
Joints (Structural Components)
14%
FIR Filter
14%
Delay Constraint
14%
Wireless Sensor Network
14%
Voltage Scaling
14%
And Logic Gate
14%
Flip Flop Circuits
14%
Logic Synthesis
13%
Boolean Function
13%
Process Parameter
12%
Experimental Result
12%
Portable Electronics
12%
Learning Algorithm
12%
Integrated Circuit
12%
Computer Science
Logic Gate
62%
Convolutional Neural Network
39%
Multicore Processor
39%
Energy Efficiency
36%
Timing Analysis
32%
Application Specific Integrated Circuit
32%
Threshold Voltage
28%
Process Variation
25%
Energy Efficient
22%
Multicore
19%
Digital Circuit
19%
Neural Network
19%
Learning Algorithm
17%
Boolean Function
17%
Migration Task
17%
Energy Consumption
15%
Embedded Systems
14%
Deep Neural Network
14%
Random Access Memory
14%
binary decision diagram
14%
Field Programmable Gate Arrays
13%
Power Consumption
13%
Parallelism
13%
Logic Element
13%
Experimental Result
13%
Benchmark Circuit
12%
Design-Space Exploration
12%
Monte Carlo Simulation
12%
Thermal Management
12%
Potential Application
12%
Neural Network Model
11%
Optimization Problem
10%
Computational Complexity
10%
task-scheduling
10%
Speed-up
9%
Static Power
9%
cluster-head
9%
Read Operation
9%
Energy Optimization
9%
Logic Array
9%
Arithmetic Circuit
9%
Power Optimization
9%
Training Process
9%
Computing Platform
9%
Memory Access
9%
Dynamic Voltage and Frequency Scaling
9%
Runtime Complexity
9%
Deep Learning
9%
Design Parameter
8%
Dynamic Voltage Scaling
8%
Keyphrases
Process Variation
33%
Threshold Logic
21%
Threshold Gate
18%
Statistical Timing Analysis
16%
Flip-flop
16%
Energy Efficiency
12%
Single chip
12%
Transistor
11%
Array Architecture
11%
Threshold Function
11%
Leakage Minimization
11%
Digital Circuits
10%
Thermal Constraint
9%
Echo Cancellation
9%
Balanced Coverage
9%
Coverage Time
9%
Clustered Wireless Sensor Networks
9%
Cluster Head
9%
Field Programmable Analog Array
9%
On-chip Learning
9%
Leakage Delay
9%
Synaptic Device
9%
Deep Neural Network
9%
Timing Analysis
9%
Logic Arrays
9%
Gate Array
9%
Timing Yield
9%
Quantized Neural Networks
9%
High-speed Communication
9%
Gate Sizing
9%
Edge Triggered
9%
Weight Update
9%
Threshold Voltage
9%
Basic Logic
8%
Logic Element
8%
Statistical Bounds
8%
Convolutional Neural Network Accelerator
8%
Thermal-aware Floorplanning
8%
Leakage Power
8%
Temperature Variation
7%
Power Model
7%
Gate Delay
7%
Statistical Delay
7%
Convolutional Neural Network
7%
Fully Parallel
7%
Thermal Model
7%
Pocket Computers
7%
Circuit Size
7%
Power Optimization
6%
Clocking Scheme
6%
