0.43nJ, 0.48pJ/step second-order ∆Σ current-to-digital converter for IoT applications

Mohammadhadi Danesh, Akshay Jayaraj, Sanjeev Tannirkulam Chandrasekaran, Arindam Sanyal

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Scopus citations

Abstract

A second-order ∆Σ current-to-digital converter (CDC) for IoT sensing applications is presented in this paper. The proposed CDC uses pseudo-differential current-starved ring oscillators as phase domain integrators. A negative feedback loop relaxes input ring oscillator nonlinearity. The proposed architecture does not require excess loop delay compensation or nonlinearity calibration. Digital differentiation using XOR implements an intrinsic first-order high-pass shaping of static element mismatch in the current steering digital-to-analog converter. A prototype CDC in 65nm CMOS process achieves 62dB dynamic range at 0.48pJ/conversion-step and has 20X better energy-efficiency than state-of-the-art.

Original languageEnglish (US)
Title of host publication2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728103976
DOIs
StatePublished - 2019
Externally publishedYes
Event2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Sapporo, Japan
Duration: May 26 2019May 29 2019

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume2019-May

Conference

Conference2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019
Country/TerritoryJapan
CitySapporo
Period5/26/195/29/19

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Fingerprint

Dive into the research topics of '0.43nJ, 0.48pJ/step second-order ∆Σ current-to-digital converter for IoT applications'. Together they form a unique fingerprint.

Cite this