A Discovery Platform to Characterize Emerging Nonvolatile Memories for Computing

Memory-centric architectures such as analog in memory computing (IMC) offer the potential for orders of magnitude improvements in energy efficiency and performance beyond state of the art. These architectures perform computations such as multiply-accumulate directly within memory array circuitry. Analog IMC and related architectures create markedly different requirements for memory devices than those of digital systems and a wide array of emerging memory candidate devices have been proposed to best meet these requirements. Accurate assessment of candidate device suitability requires characterizing the behavior in CMOS-integrated arrays, closely representing operation in a real IMC system. To address this, we have developed an analog memory array characterization platform that enables the detailed electrical characterization and optimization of these candidate memory device arrays, allowing accurate modeling and prediction of their behavior in IMC systems.