A Novel Pseudo-Flash Based Digital Low Dropout (LDO) Voltage Regulator

Cheng Yen Lee, Sunil P. Khatri, Sarma Vrudhula

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In this paper, we present a pseudo-flash based digital low dropout (Digital LDO) voltage regulator. The novelty of our pseudo-flash based Digital LDO (PFD-LDO) voltage regulator lies in the fact that we use pseudo-flash (or alternately, flash) transistor subarrays for voltage regulation. By changing the threshold voltage (and thereby, the ON resistance) of these transistors, we can use the same design to meet different regulator specifications. The threshold voltage can be programmed either at the factory by the manufacturer or in the field by the user. This gives the manufacturer the ability to offer a family of LDO regulators with a single design, a significant economic advantage. In addition, aging effects and temperature variations are effectively erased since the threshold voltage of the pseudo-flash (or flash) transistors can be tuned to a fine degree in the field. Similarly, process variations can be cancelled after manufacturing in the factory. These advantages are absent in traditional LDO regulators. Our design uses two subarrays. A coarse subarray is used to reduce the recovery time and output voltage overshoot/undershoot, while a fine subarray regulates the output voltage, minimizing the output voltage ripple. Unlike state-of-the-art LDO regulators, our design can realize multiple specifications with the same circuit. For example, we demonstrate that the Vout of the proposed PFD-LDO regulator can range from 0.7V to 1.7V when the supply voltage VIN ranges from 0.8V to 1.8V, using the same circuit design. Over this voltage range, the proposed PFD-LDO regulator achieves Vshoot < 144mV, trec < 0.41μs and Vripple < 7.3mV when the Imax ranges from 15mA to 250mA.

Original languageEnglish (US)
Title of host publicationProceedings of the 24th International Symposium on Quality Electronic Design, ISQED 2023
PublisherIEEE Computer Society
ISBN (Electronic)9798350334753
DOIs
StatePublished - 2023
Event24th International Symposium on Quality Electronic Design, ISQED 2023 - San Francisco, United States
Duration: Apr 5 2023Apr 7 2023

Publication series

NameProceedings - International Symposium on Quality Electronic Design, ISQED
Volume2023-April

Conference

Conference24th International Symposium on Quality Electronic Design, ISQED 2023
Country/TerritoryUnited States
CitySan Francisco
Period4/5/234/7/23

Keywords

  • Digital LDO regulator
  • low output voltage ripple
  • multiple current ranges
  • pseudo-flash transistor

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality

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