Automatic generation of operation tables for fast exploration of bypasses in embedded processors

Park Sanghyun, Aviral Shrivastava, Nikil Duttt, Eugene Earlie, Alex Nicolau, Paek Yunheung

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Abstract

Customizing the bypasses in an embedded processor uncovers valuable trade-offs between the power, performance and the cost of the processor. Meaningful exploration of bypasses requires bypass-sensitive compiler. Operation Tables (OTs) have been proposed to perform bypass-sensitive compilation. However, due to lack of automated methods to generate OTs, OTs are currently manually specified by the designer. Manual specification of OTs is not only an extremely time consuming task, but is also highly error-prone. In this paper, we present AutoOT, an algorithm to automatically generate OTs from a high-level processor description. Our experiments on the Intel XScale processor model running MiBench benchmarks demonstrate that AutoOT greatly reduces the time and effort of specification. Automatic generation of OTs makes it feasible to perform full bypass exploration on the. Intel XScale and thus discover interesting alternate by-pass configurations in a reasonable time. To further reduce the compile-time overhead of OT generation, we propose another novel algorithm, AutoOTDB. AutoOTDB is able to cut the compile-time overhead of OT generation by half.

Original languageEnglish (US)
Title of host publicationProceedings - Design, Automation and Test in Europe, DATE'06
StatePublished - 2006
Externally publishedYes
EventDesign, Automation and Test in Europe, DATE'06 - Munich, Germany
Duration: Mar 6 2006Mar 10 2006

Publication series

NameProceedings -Design, Automation and Test in Europe, DATE
Volume1

Other

OtherDesign, Automation and Test in Europe, DATE'06
Country/TerritoryGermany
CityMunich
Period3/6/063/10/06

ASJC Scopus subject areas

  • General Engineering

Fingerprint

Dive into the research topics of 'Automatic generation of operation tables for fast exploration of bypasses in embedded processors'. Together they form a unique fingerprint.

Cite this