Circuit technique for threshold voltage stabilization using substrate bias in total dose environments

Jayanth K. Shreedhara; Hugh J. Barnaby; Bharat L. Bhuva; David V. Kerns; Sherra E. Kerns

doi:10.1109/23.903808

Circuit technique for threshold voltage stabilization using substrate bias in total dose environments

Jayanth K. Shreedhara, Hugh J. Barnaby, Bharat L. Bhuva, David V. Kerns, Sherra E. Kerns

Research output: Contribution to journal › Conference article › peer-review

3 Scopus citations

Abstract

Radiation tolerance of CMOS circuits to total dose can be improved by adjusting the p-substrate voltage to keep the n-channel threshold voltage above a minimum value. This paper presents a circuit design, implemented on an IC and on a breadboard, for dynamically adjusting the substrate voltage. Experimental results clearly show that devices with threshold voltage stabilization exhibit longer lifetime as compared to those without the stabilization circuit.

Original language	English (US)
Pages (from-to)	2557-2560
Number of pages	4
Journal	IEEE Transactions on Nuclear Science
Volume	47
Issue number	6 III
DOIs	https://doi.org/10.1109/23.903808
State	Published - Dec 2000
Externally published	Yes
Event	2000 IEEE Nuclear and Space Radiation Effects Conference (NSREC) - Reno, NV, United States Duration: Jul 24 2000 → Jul 28 2000

ASJC Scopus subject areas

Nuclear and High Energy Physics
Nuclear Energy and Engineering
Electrical and Electronic Engineering

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10.1109/23.903808

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abstract = "Radiation tolerance of CMOS circuits to total dose can be improved by adjusting the p-substrate voltage to keep the n-channel threshold voltage above a minimum value. This paper presents a circuit design, implemented on an IC and on a breadboard, for dynamically adjusting the substrate voltage. Experimental results clearly show that devices with threshold voltage stabilization exhibit longer lifetime as compared to those without the stabilization circuit.",

author = "Shreedhara, {Jayanth K.} and Barnaby, {Hugh J.} and Bhuva, {Bharat L.} and Kerns, {David V.} and Kerns, {Sherra E.}",

year = "2000",

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language = "English (US)",

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issn = "0018-9499",

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note = "2000 IEEE Nuclear and Space Radiation Effects Conference (NSREC) ; Conference date: 24-07-2000 Through 28-07-2000",

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AU - Shreedhara, Jayanth K.

AU - Barnaby, Hugh J.

AU - Bhuva, Bharat L.

AU - Kerns, David V.

AU - Kerns, Sherra E.

PY - 2000/12

Y1 - 2000/12

N2 - Radiation tolerance of CMOS circuits to total dose can be improved by adjusting the p-substrate voltage to keep the n-channel threshold voltage above a minimum value. This paper presents a circuit design, implemented on an IC and on a breadboard, for dynamically adjusting the substrate voltage. Experimental results clearly show that devices with threshold voltage stabilization exhibit longer lifetime as compared to those without the stabilization circuit.

AB - Radiation tolerance of CMOS circuits to total dose can be improved by adjusting the p-substrate voltage to keep the n-channel threshold voltage above a minimum value. This paper presents a circuit design, implemented on an IC and on a breadboard, for dynamically adjusting the substrate voltage. Experimental results clearly show that devices with threshold voltage stabilization exhibit longer lifetime as compared to those without the stabilization circuit.

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DO - 10.1109/23.903808

M3 - Conference article

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VL - 47

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JO - IEEE Transactions on Nuclear Science

JF - IEEE Transactions on Nuclear Science

IS - 6 III

T2 - 2000 IEEE Nuclear and Space Radiation Effects Conference (NSREC)

Y2 - 24 July 2000 through 28 July 2000

ER -

Circuit technique for threshold voltage stabilization using substrate bias in total dose environments

Abstract

ASJC Scopus subject areas

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