CMOS source-coupled logic for mixed-mode VLSI

Sayfe Kiaei; San Hwa Chee; Dave Allstot

CMOS source-coupled logic for mixed-mode VLSI

Sayfe Kiaei, San Hwa Chee, Dave Allstot

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

A fully differential source-coupled logic technique intended for mixed-mode applications has been developed. Implemented in 2-μm CMOS technology with a 5.0-V supply, the minimum propagation delay is about 750 ps with an 800-mV logic swing. Power supply current spikes are reduced by about two orders of magnitude compared to conventional static CMOS logic.

Original language	English (US)
Title of host publication	Proceedings - IEEE International Symposium on Circuits and Systems
Publisher	Publ by IEEE
Pages	1608-1611
Number of pages	4
Volume	2
State	Published - 1990
Externally published	Yes
Event	1990 IEEE International Symposium on Circuits and Systems Part 3 (of 4) - New Orleans, LA, USA Duration: May 1 1990 → May 3 1990

Other

Other	1990 IEEE International Symposium on Circuits and Systems Part 3 (of 4)
City	New Orleans, LA, USA
Period	5/1/90 → 5/3/90

ASJC Scopus subject areas

Electrical and Electronic Engineering
Electronic, Optical and Magnetic Materials

Cite this

@inproceedings{b5387067d995479987d060be69cd096d,

title = "CMOS source-coupled logic for mixed-mode VLSI",

abstract = "A fully differential source-coupled logic technique intended for mixed-mode applications has been developed. Implemented in 2-μm CMOS technology with a 5.0-V supply, the minimum propagation delay is about 750 ps with an 800-mV logic swing. Power supply current spikes are reduced by about two orders of magnitude compared to conventional static CMOS logic.",

author = "Sayfe Kiaei and Chee, {San Hwa} and Dave Allstot",

year = "1990",

language = "English (US)",

volume = "2",

pages = "1608--1611",

booktitle = "Proceedings - IEEE International Symposium on Circuits and Systems",

publisher = "Publ by IEEE",

note = "1990 IEEE International Symposium on Circuits and Systems Part 3 (of 4) ; Conference date: 01-05-1990 Through 03-05-1990",

}

TY - GEN

T1 - CMOS source-coupled logic for mixed-mode VLSI

AU - Kiaei, Sayfe

AU - Chee, San Hwa

AU - Allstot, Dave

PY - 1990

Y1 - 1990

N2 - A fully differential source-coupled logic technique intended for mixed-mode applications has been developed. Implemented in 2-μm CMOS technology with a 5.0-V supply, the minimum propagation delay is about 750 ps with an 800-mV logic swing. Power supply current spikes are reduced by about two orders of magnitude compared to conventional static CMOS logic.

AB - A fully differential source-coupled logic technique intended for mixed-mode applications has been developed. Implemented in 2-μm CMOS technology with a 5.0-V supply, the minimum propagation delay is about 750 ps with an 800-mV logic swing. Power supply current spikes are reduced by about two orders of magnitude compared to conventional static CMOS logic.

UR - http://www.scopus.com/inward/record.url?scp=0025628949&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0025628949&partnerID=8YFLogxK

M3 - Conference contribution

VL - 2

SP - 1608

EP - 1611

BT - Proceedings - IEEE International Symposium on Circuits and Systems

PB - Publ by IEEE

T2 - 1990 IEEE International Symposium on Circuits and Systems Part 3 (of 4)

Y2 - 1 May 1990 through 3 May 1990

ER -

CMOS source-coupled logic for mixed-mode VLSI

Abstract

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ASJC Scopus subject areas

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