Abstract
Recently proposed multicarrier memory channel architecture [1], [2] pioneered the use of substrate integrated waveguide (SIW) as a viable high-bandwidth interconnect in memory channels. In this paper, we validate the merit of our proposal by comparing it with a leading transmission-line-based bandpass filter (TLBPF). We show that in X -band that the SIW interconnect achieves more than two times higher bandwidth than TLBPF. TLBPF suffers from the impact of conductive attenuation, which causes the outer symbols to drift in toward the center of the constellation diagram and results in an abrupt degradation in bit error rate (BER). The cumulative effects of such impairments cause TLBPF-based platform to saturate at 200-MHz rate (2400 Mb/s). In contrast, SIW-based platform achieves 400-MHz transfer rate (4800 Mb/s) without equalization and/or signal recovery algorithms while preserving a BER smaller than 3.0e -3 and an error vector magnitude less than 9.7%.
Original language | English (US) |
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Article number | 8589004 |
Pages (from-to) | 719-727 |
Number of pages | 9 |
Journal | IEEE Transactions on Components, Packaging and Manufacturing Technology |
Volume | 9 |
Issue number | 4 |
DOIs | |
State | Published - Apr 2019 |
Keywords
- DDR memory
- hairpin filter
- memory wall
- multicarrier memory
- signal integrity
- substrate integrated waveguide (SIW)
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Industrial and Manufacturing Engineering
- Electrical and Electronic Engineering