TY - GEN
T1 - ConvLight
T2 - 24th IEEE International Conference on High Performance Computing, HiPC 2017
AU - Dang, Dharanidhar
AU - Dass, Jyotikrishna
AU - Mahapatra, Rabi
N1 - Publisher Copyright: © 2017 IEEE.
PY - 2017/7/2
Y1 - 2017/7/2
N2 - Neuromorphic computing is a promising candidate to accelerate big data processing. Recently, several attempts have been made to design neuromorphic accelerators for popular machine learning algorithms, such as reservoir computing, deep learning, spiking neurons etc. Deep learning accelerator which involves convolutional neural networks (CNNs) have received widespread attention for their accuracy and efficiency. This paper proposes ConvLight, a novel deep learning accelerator based on memristor integrated photonic computing framework. While the use of on-chip photonic circuits for analog computing is well known, no prior work has demonstrated a full-fledged accelerator based on photonic components. In particular, this paper makes the following novel contributions: (i) A multilayer deep learning architecture design is proposed using compute efficient memristors and photonic components for the first time. (ii) A pipelined design for each CNN layer is presented for maximizing throughput and enabling parallelism across the layers. (iii) Simulation of ConvLight architecture with standard photonic tools for demonstrating the execution of DNN and CNN workloads yielding 25X, 60X, and 40X improvements in computational efficiency, throughput, and energy efficiency (respectively) compared to state-of-the-art design.
AB - Neuromorphic computing is a promising candidate to accelerate big data processing. Recently, several attempts have been made to design neuromorphic accelerators for popular machine learning algorithms, such as reservoir computing, deep learning, spiking neurons etc. Deep learning accelerator which involves convolutional neural networks (CNNs) have received widespread attention for their accuracy and efficiency. This paper proposes ConvLight, a novel deep learning accelerator based on memristor integrated photonic computing framework. While the use of on-chip photonic circuits for analog computing is well known, no prior work has demonstrated a full-fledged accelerator based on photonic components. In particular, this paper makes the following novel contributions: (i) A multilayer deep learning architecture design is proposed using compute efficient memristors and photonic components for the first time. (ii) A pipelined design for each CNN layer is presented for maximizing throughput and enabling parallelism across the layers. (iii) Simulation of ConvLight architecture with standard photonic tools for demonstrating the execution of DNN and CNN workloads yielding 25X, 60X, and 40X improvements in computational efficiency, throughput, and energy efficiency (respectively) compared to state-of-the-art design.
KW - Accelerator
KW - Big Data
KW - CNN
KW - DNN
KW - Machine Learning
KW - Neuromorphic Computing
KW - Photonic
UR - https://www.scopus.com/pages/publications/85050358555
UR - https://www.scopus.com/pages/publications/85050358555#tab=citedBy
U2 - 10.1109/HiPC.2017.00022
DO - 10.1109/HiPC.2017.00022
M3 - Conference contribution
T3 - Proceedings - 24th IEEE International Conference on High Performance Computing, HiPC 2017
SP - 114
EP - 123
BT - Proceedings - 24th IEEE International Conference on High Performance Computing, HiPC 2017
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 18 December 2017 through 21 December 2017
ER -