TY - GEN
T1 - Enhancing True Random Number Generation in MRAM Devices Through Response Adjustment
AU - Jain, Saloni
AU - Rios, Manuel Aguilar
AU - Cambou, Bertrand
N1 - Publisher Copyright: © The Author(s), under exclusive license to Springer Nature Switzerland AG 2024.
PY - 2024
Y1 - 2024
N2 - Random number generators (RNGs) play a crucial role in cryptographic schemes. If the generated random numbers exhibit patterns or are predictable, it can lead to vulnerabilities and compromise the security of cryptographic protocols, including confidentiality, integrity, and authenticity. However, not all RNGs are suitable for cryptographic applications. Pseudo-random number generators (PRNGs), which are based on mathematical formulas, are highly vulnerable to attacks and can be predictable. Cryptographically Secure Pseudo-random Number Generators (CSPRNGs) offer improved security but require more resources and can still be predictable if the seed is known. True Random Number Generators (TRNGs) extract randomness from physical sources, such as atmospheric noise, thermal noise, or radioactive decay, making them truly unpredictable. Memory Physically Unclonable Functions (PUFs) are promising candidates for TRNGs as they leverage the random silicon fabrication process to generate inherent randomness. The objective of this work is to improve an MRAM-based TRNG by manipulating the analog responses. We propose both hardware and software implementations of TRNG schemes. To evaluate the randomness and quality of the generated sequences, we subject them to the statistical test suite from the National Institute of Standards and Technology (NIST) designed for assessing random and pseudo-random numbers. Additionally, we introduce a post-processing method that involves XORing the generated numbers with pseudo-random numbers to enhance the randomness further and strengthen the overall security of the TRNG.
AB - Random number generators (RNGs) play a crucial role in cryptographic schemes. If the generated random numbers exhibit patterns or are predictable, it can lead to vulnerabilities and compromise the security of cryptographic protocols, including confidentiality, integrity, and authenticity. However, not all RNGs are suitable for cryptographic applications. Pseudo-random number generators (PRNGs), which are based on mathematical formulas, are highly vulnerable to attacks and can be predictable. Cryptographically Secure Pseudo-random Number Generators (CSPRNGs) offer improved security but require more resources and can still be predictable if the seed is known. True Random Number Generators (TRNGs) extract randomness from physical sources, such as atmospheric noise, thermal noise, or radioactive decay, making them truly unpredictable. Memory Physically Unclonable Functions (PUFs) are promising candidates for TRNGs as they leverage the random silicon fabrication process to generate inherent randomness. The objective of this work is to improve an MRAM-based TRNG by manipulating the analog responses. We propose both hardware and software implementations of TRNG schemes. To evaluate the randomness and quality of the generated sequences, we subject them to the statistical test suite from the National Institute of Standards and Technology (NIST) designed for assessing random and pseudo-random numbers. Additionally, we introduce a post-processing method that involves XORing the generated numbers with pseudo-random numbers to enhance the randomness further and strengthen the overall security of the TRNG.
KW - Cryptographic schemes
KW - Exclusive OR logic (XOR)
KW - Low power
KW - Magnetoresistive random access memory (MRAM)
KW - Memory array components
KW - Non-volatile
KW - Physical unclonable function (PUF)
KW - Pseudo-random number generation
KW - Random number generation
KW - Ternary states
KW - True random number generation
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U2 - 10.1007/978-3-031-62273-1_28
DO - 10.1007/978-3-031-62273-1_28
M3 - Conference contribution
SN - 9783031622724
T3 - Lecture Notes in Networks and Systems
SP - 438
EP - 454
BT - Intelligent Computing - Proceedings of the 2024 Computing Conference
A2 - Arai, Kohei
PB - Springer Science and Business Media Deutschland GmbH
T2 - Science and Information Conference, SAI 2024
Y2 - 11 July 2024 through 12 July 2024
ER -