TY - GEN
T1 - Intelligent design automation of VLSI interconnects
AU - Hsu, P.
AU - Voranantakul, S.
AU - Rozenblit, J. W.
AU - Prince, J. L.
N1 - Funding Information: This research is supported in part by the Semiconductor Research Corporation under Contract 90-MP-086. Publisher Copyright: © 1992 IEEE.
PY - 1992
Y1 - 1992
N2 - Interconnection and packaging are among the dominant factors that limit the performance of future integrated circuits containing millions of transistors. As chips become more complex, so does the packaging. Design automation is thus without doubt necessary. In this paper, a window based simulation environment called PDSE (Packaging Design Support Environment) which integrates several tools for VLSI interconnection modeling and simulations is presented. We will describe the concept of the automated packaging design cycle, the structure and the components of the simulation environment, and the implementation of an interconnect layout geometry data extractor. Finally a case study will be given to illustrate the entire design process.
AB - Interconnection and packaging are among the dominant factors that limit the performance of future integrated circuits containing millions of transistors. As chips become more complex, so does the packaging. Design automation is thus without doubt necessary. In this paper, a window based simulation environment called PDSE (Packaging Design Support Environment) which integrates several tools for VLSI interconnection modeling and simulations is presented. We will describe the concept of the automated packaging design cycle, the structure and the components of the simulation environment, and the implementation of an interconnect layout geometry data extractor. Finally a case study will be given to illustrate the entire design process.
UR - http://www.scopus.com/inward/record.url?scp=84909897742&partnerID=8YFLogxK
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U2 - 10.1109/PCCC.1992.200577
DO - 10.1109/PCCC.1992.200577
M3 - Conference contribution
T3 - 11th Annual International Phoenix Conference on Computers and Communication, IPCCC 1992 - Proceedings
SP - 349
EP - 355
BT - 11th Annual International Phoenix Conference on Computers and Communication, IPCCC 1992 - Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 11th Annual International Phoenix Conference on Computers and Communication, IPCCC 1992
Y2 - 1 April 1992 through 3 April 1992
ER -