TY - GEN
T1 - Parallel architecture for large scale production systems
AU - Hwang, K. W.
AU - Tan, J.
AU - Wang, J. H.
AU - Srivastava, J.
PY - 1989/12/1
Y1 - 1989/12/1
N2 - The authors present an architecture, suitable for implementation on a shared memory multiprocessor system, in which all the phases can run in parallel. Running multiple match, execution, and select phases causes subtle synchronization problems, which if not resolved can lead to altered semantics. The proposed architecture uses a lock and interference manager and a scheduler to resolve the possible synchronization conflicts. A new lock which provides concurrency beyond the standard two-phase locking in databases is used. The conflict resolution phase has been formalized as a scheduling problem. The approach taken is conservative in the sense that the scheduler performs careful analysis (interference avoidance and abort avoidance tests) to prevent interference, abort, and blocking.
AB - The authors present an architecture, suitable for implementation on a shared memory multiprocessor system, in which all the phases can run in parallel. Running multiple match, execution, and select phases causes subtle synchronization problems, which if not resolved can lead to altered semantics. The proposed architecture uses a lock and interference manager and a scheduler to resolve the possible synchronization conflicts. A new lock which provides concurrency beyond the standard two-phase locking in databases is used. The conflict resolution phase has been formalized as a scheduling problem. The approach taken is conservative in the sense that the scheduler performs careful analysis (interference avoidance and abort avoidance tests) to prevent interference, abort, and blocking.
UR - http://www.scopus.com/inward/record.url?scp=0024878699&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=0024878699&partnerID=8YFLogxK
M3 - Conference contribution
SN - 0818619848
T3 - IEEE Int Workshop Tools Artif Intell Archit Lang Algorithms
SP - 27
EP - 33
BT - IEEE Int Workshop Tools Artif Intell Archit Lang Algorithms
A2 - Anon, null
PB - Publ by IEEE
T2 - IEEE International Workshop on Tools for Artificial Intelligence: Architectures, Languages and Algorithms
Y2 - 23 October 1989 through 25 October 1989
ER -