TY - GEN
T1 - Performance and reliability characterization of 1200 V silicon carbide power MOSFETs and JFETs at high temperatures
AU - Flicker, Jack
AU - Hughart, David
AU - Kaplar, Robert
AU - Atcitty, Stanley
AU - Marinella, Matthew
PY - 2014
Y1 - 2014
N2 - 1200 V Silicon Carbide (SiC) Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs) and Junction Field Effect Transistors (JFETs) have been characterized at high operational temperatures. For packaged JFETs obtained from a collaborating manufacturer, the threshold shift (ΔVT) was measured under both static and dynamic voltage stress and, in all cases, was less than 2 mV, which is within the measurement margin of error. Temperatures up to 250°C and stress times as long as 200 hours were evaluated. As a comparison, commercially available SiC MOSFETs demonstrated shifts of up to 300 mV after 30 minutes of static gate stress at 175°C. In addition, results from unpackaged JFET die at temperatures up to 525°C show ΔVT values of less than 10 mV for all stress conditions. Although VT remained unchanged for the duration of the test for both static and dynamic stress conditions, under dynamic stress conditions the JFET packaged parts demonstrated a linear increase in sub-threshold leakage current of around 15.6 nA per hour; in contrast, the MOSFET devices showed an exponential increase in sub-threshold leakage under dynamic stress. The increase in sub-threshold leakage current could be recovered temporarily, but long-term behavior was consistent with cumulative damage.
AB - 1200 V Silicon Carbide (SiC) Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs) and Junction Field Effect Transistors (JFETs) have been characterized at high operational temperatures. For packaged JFETs obtained from a collaborating manufacturer, the threshold shift (ΔVT) was measured under both static and dynamic voltage stress and, in all cases, was less than 2 mV, which is within the measurement margin of error. Temperatures up to 250°C and stress times as long as 200 hours were evaluated. As a comparison, commercially available SiC MOSFETs demonstrated shifts of up to 300 mV after 30 minutes of static gate stress at 175°C. In addition, results from unpackaged JFET die at temperatures up to 525°C show ΔVT values of less than 10 mV for all stress conditions. Although VT remained unchanged for the duration of the test for both static and dynamic stress conditions, under dynamic stress conditions the JFET packaged parts demonstrated a linear increase in sub-threshold leakage current of around 15.6 nA per hour; in contrast, the MOSFET devices showed an exponential increase in sub-threshold leakage under dynamic stress. The increase in sub-threshold leakage current could be recovered temporarily, but long-term behavior was consistent with cumulative damage.
UR - https://www.scopus.com/pages/publications/84916235807
UR - https://www.scopus.com/pages/publications/84916235807#tab=citedBy
M3 - Conference contribution
T3 - International Conference and Exhibition on High Temperature Electronics, HiTEC 2014
SP - 334
EP - 340
BT - International Conference and Exhibition on High Temperature Electronics, HiTEC 2014
PB - IMAPS-International Microelectronics and Packaging Society
T2 - IMAPS International Conference and Exhibition on High Temperature Electronics, HiTEC 2014
Y2 - 13 May 2014 through 15 May 2014
ER -