TY - GEN
T1 - Process independent gain measurement with low overhead via BIST/DUT co-design
AU - Jeong, Jae Woong
AU - Kitchen, Jennifer
AU - Ozev, Sule
N1 - Publisher Copyright: © 2016 IEEE.
PY - 2016/5/23
Y1 - 2016/5/23
N2 - Built-in Self-Test (BIST) is essential, particularly for radio frequency (RF) devices where off-chip RF signal analysis is costly or in some cases, infeasible. Two major problems have made RF BIST elusive. First, process variations make the BIST circuit behavior hard to predict, limiting accuracy of measurements. Second, the overhead, particularly in terms of performance degradation, make RF BIST undesirable. In this paper, we address these two issues for RF BIST gain measurement. First, we show that by setting up relative gain measurements and carefully crafting the BIST methodology and the matching BIST circuit, the effect of process variations on measurement accuracy can be suppressed. Second, by co-designing the BIST circuit together with the device under test (DUT), performance impact can be eliminated or significantly reduced. To demonstrate the proposed approach, we design a low noise amplifier (LNA) as the DUT together with the BIST circuit. We also design a stand-alone LNA with the same specifications and manufacture these two circuits on the same die. We show that the LNA gain can be determined very accurately, using only DC measurements, and the performance impact of the BIST circuit is negligible.
AB - Built-in Self-Test (BIST) is essential, particularly for radio frequency (RF) devices where off-chip RF signal analysis is costly or in some cases, infeasible. Two major problems have made RF BIST elusive. First, process variations make the BIST circuit behavior hard to predict, limiting accuracy of measurements. Second, the overhead, particularly in terms of performance degradation, make RF BIST undesirable. In this paper, we address these two issues for RF BIST gain measurement. First, we show that by setting up relative gain measurements and carefully crafting the BIST methodology and the matching BIST circuit, the effect of process variations on measurement accuracy can be suppressed. Second, by co-designing the BIST circuit together with the device under test (DUT), performance impact can be eliminated or significantly reduced. To demonstrate the proposed approach, we design a low noise amplifier (LNA) as the DUT together with the BIST circuit. We also design a stand-alone LNA with the same specifications and manufacture these two circuits on the same die. We show that the LNA gain can be determined very accurately, using only DC measurements, and the performance impact of the BIST circuit is negligible.
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U2 - 10.1109/VTS.2016.7477284
DO - 10.1109/VTS.2016.7477284
M3 - Conference contribution
T3 - Proceedings of the IEEE VLSI Test Symposium
BT - Proceedings - 2016 IEEE 34th VLSI Test Symposium, VTS 2016
PB - IEEE Computer Society
T2 - 34th IEEE VLSI Test Symposium, VTS 2016
Y2 - 25 April 2016 through 27 April 2016
ER -