Real-time VLSI architecture for video compression

O. Fatemi; S. Panchanathan

doi:10.1109/CCECE.1995.528091

Real-time VLSI architecture for video compression

O. Fatemi
, S. Panchanathan

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Video compression is becoming increasingly important in several applications. Vector quantization (VQ) is a powerful technique for very low bit rate image/video compression and is an attractive technique for mobile multimedia applications. Adaptive VQ techniques provide an excellent coding performance at the expense of significant increases in computational complexity making real-time implementation difficult. In this paper, we propose a VLSI chip-set design to implement a high performance cache based (adaptive) VQ (CVQ) technique using VHDL for real-time video compression.

Original language	English (US)
Title of host publication	Canadian Conference on Electrical and Computer Engineering
Publisher	IEEE
Pages	128-131
Number of pages	4
Volume	1
ISBN (Print)	0780327667
DOIs	https://doi.org/10.1109/CCECE.1995.528091
State	Published - 1995
Externally published	Yes
Event	Proceedings of the 1995 Canadian Conference on Electrical and Computer Engineering. Part 1 (of 2) - Montreal, Can Duration: Sep 5 1995 → Sep 8 1995

Other

Other	Proceedings of the 1995 Canadian Conference on Electrical and Computer Engineering. Part 1 (of 2)
City	Montreal, Can
Period	9/5/95 → 9/8/95

ASJC Scopus subject areas

Hardware and Architecture
Electrical and Electronic Engineering

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10.1109/CCECE.1995.528091

Cite this

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title = "Real-time VLSI architecture for video compression",

abstract = "Video compression is becoming increasingly important in several applications. Vector quantization (VQ) is a powerful technique for very low bit rate image/video compression and is an attractive technique for mobile multimedia applications. Adaptive VQ techniques provide an excellent coding performance at the expense of significant increases in computational complexity making real-time implementation difficult. In this paper, we propose a VLSI chip-set design to implement a high performance cache based (adaptive) VQ (CVQ) technique using VHDL for real-time video compression.",

author = "O. Fatemi and S. Panchanathan",

year = "1995",

doi = "10.1109/CCECE.1995.528091",

language = "English (US)",

isbn = "0780327667",

volume = "1",

pages = "128--131",

booktitle = "Canadian Conference on Electrical and Computer Engineering",

publisher = "IEEE",

note = "Proceedings of the 1995 Canadian Conference on Electrical and Computer Engineering. Part 1 (of 2) ; Conference date: 05-09-1995 Through 08-09-1995",

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AU - Panchanathan, S.

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AB - Video compression is becoming increasingly important in several applications. Vector quantization (VQ) is a powerful technique for very low bit rate image/video compression and is an attractive technique for mobile multimedia applications. Adaptive VQ techniques provide an excellent coding performance at the expense of significant increases in computational complexity making real-time implementation difficult. In this paper, we propose a VLSI chip-set design to implement a high performance cache based (adaptive) VQ (CVQ) technique using VHDL for real-time video compression.

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UR - https://www.scopus.com/pages/publications/0029483787#tab=citedBy

U2 - 10.1109/CCECE.1995.528091

DO - 10.1109/CCECE.1995.528091

M3 - Conference contribution

SN - 0780327667

VL - 1

SP - 128

EP - 131

BT - Canadian Conference on Electrical and Computer Engineering

PB - IEEE

T2 - Proceedings of the 1995 Canadian Conference on Electrical and Computer Engineering. Part 1 (of 2)

Y2 - 5 September 1995 through 8 September 1995

ER -

Real-time VLSI architecture for video compression

Abstract

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ASJC Scopus subject areas

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