TY - GEN
T1 - RF circuit authentication for detection of process Trojans
AU - Karabacak, Fatih
AU - Welker, Richard
AU - Casto, Matthew J.
AU - Kitchen, Jennifer
AU - Ozev, Sule
N1 - Funding Information: This work is supported by US Air Force Research Lab and Alphacore Inc. through a contract with Number FA865016M1788 and the NSF I/UCRC Center for Embedded Systems with grant Number 1361926. Publisher Copyright: © 2018 IEEE.
PY - 2018/5/29
Y1 - 2018/5/29
N2 - Globalized supply chain for electronic circuit manufacturing has reduced the production cost considerably. However, it also presents a challenge since many companies/players contribute to the product and it is not always possible to control or monitor every third-party employee or contractor that takes part in the process. A design house that relies on a foundry for manufacturing needs to ensure that the manufactured devices conform to the agreed-upon process model between the design house and the foundry. Potential deviation from the process model may be due to incidental quality control issues, or due to malicious modifications to the process or circuit layout with the intent of doing harm during in-field operation. In this paper, we present a multivariate methodology to detect even small process and layout level modifications to the circuit by using mission-mode specifications as well as enhanced test modes. We present an algorithm for detecting process/layout modifications and for selection of test inputs to be used in the detection process. Experimental results on an LNA circuit show that the proposed technique can achieve high authentication accuracy even for a single device with a negligible false positive rate.
AB - Globalized supply chain for electronic circuit manufacturing has reduced the production cost considerably. However, it also presents a challenge since many companies/players contribute to the product and it is not always possible to control or monitor every third-party employee or contractor that takes part in the process. A design house that relies on a foundry for manufacturing needs to ensure that the manufactured devices conform to the agreed-upon process model between the design house and the foundry. Potential deviation from the process model may be due to incidental quality control issues, or due to malicious modifications to the process or circuit layout with the intent of doing harm during in-field operation. In this paper, we present a multivariate methodology to detect even small process and layout level modifications to the circuit by using mission-mode specifications as well as enhanced test modes. We present an algorithm for detecting process/layout modifications and for selection of test inputs to be used in the detection process. Experimental results on an LNA circuit show that the proposed technique can achieve high authentication accuracy even for a single device with a negligible false positive rate.
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U2 - 10.1109/VTS.2018.8368666
DO - 10.1109/VTS.2018.8368666
M3 - Conference contribution
T3 - Proceedings of the IEEE VLSI Test Symposium
SP - 1
EP - 6
BT - Proceedings - 2018 IEEE 36th VLSI Test Symposium, VTS 2018
PB - IEEE Computer Society
T2 - 36th IEEE VLSI Test Symposium, VTS 2018
Y2 - 22 April 2018 through 25 April 2018
ER -