The effect of device geometry on IGFET characteristics

J. A. Serack, A. J. Walton

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Abstract

A novel technique for the fabrication of asymmetrical incompletely gated transistors is described. The subthreshold characteristics of transistors fabricated using the technique are measured and conclusions concerning the mechanisms responsible for the observations are presented.

Original languageEnglish (US)
Title of host publicationESSDERC 1987 - 17th European Solid State Device Research Conference
PublisherIEEE Computer Society
Pages915-918
Number of pages4
ISBN (Electronic)0444704779
ISBN (Print)9780444704771
StatePublished - Jan 1 1987
Event17th European Solid State Device Research Conference, ESSDERC 1987 - Bologna, Italy
Duration: Sep 14 1987Sep 17 1987

Publication series

NameEuropean Solid-State Device Research Conference

Other

Other17th European Solid State Device Research Conference, ESSDERC 1987
Country/TerritoryItaly
CityBologna
Period9/14/879/17/87

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality

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